International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Volume4,May 2017,

Topic : Implementation and Testing of PCI Express IP Core using SpartaN 6 FPGA

Authors:Megha B. Kumbar || Sukesh Rao M.

Abstract:The motherboards nowadays come with PCI Express (PCIe) expansion slots in order to communicate with the external world. The data which is going to be received by the system is the radar data which will be in the form of Serial Front Panel Data Port (Serial FPDP) frame format. But the processors of the system can only understand the information in the form of PCI Express frame format. Thus the data has to get converted into PCI Express frame format. Therefore PCI Express IP core is used for the formation of PCI Express frame format. Once the data in the form Serial FPDP frame is received then data will be extracted and will be stored in buffer memory. Then the PCI Express IP core receives the data from memory and frames the data into PCI Express frame format and will be sent over PCI Express expansion bus to the processor. Thus in order to understand whether the PCI Express IP core works properly or not a loopback test needs to be done. Thus the PCI Express IP core is implemented on Spartan 6 FPGA along with the Bus Master DMA. In this paper the implementation and loopback testing of PCI Express IP core is mentioned..

Keywords: PCI Express frame format, PCI Express IP core, loopback test, Spartan 6 FPGA, Bus Master DMA

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DOI: 01.1617/vol4/iss5/pid90641

Volume4,May 2017,

Topic : Synthesis and Stability Characteristics of Blend of Waste Mustard and jatropha Biodiesel

Authors:Megha B. Kumbar || Sukesh Rao M.

Abstract:The motherboards nowadays come with PCI Express (PCIe) expansion slots in order to communicate with the external world. The data which is going to be received by the system is the radar data which will be in the form of Serial Front Panel Data Port (Serial FPDP) frame format. But the processors of the system can only understand the information in the form of PCI Express frame format. Thus the data has to get converted into PCI Express frame format. Therefore PCI Express IP core is used for the formation of PCI Express frame format. Once the data in the form Serial FPDP frame is received then data will be extracted and will be stored in buffer memory. Then the PCI Express IP core receives the data from memory and frames the data into PCI Express frame format and will be sent over PCI Express expansion bus to the processor. Thus in order to understand whether the PCI Express IP core works properly or not a loopback test needs to be done. Thus the PCI Express IP core is implemented on Spartan 6 FPGA along with the Bus Master DMA. In this paper the implementation and loopback testing of PCI Express IP core is mentioned..

Keywords: PCI Express frame format, PCI Express IP core, loopback test, Spartan 6 FPGA, Bus Master DMA

Download Paper


DOI: 01.1617/vol4/iss6/pid90641


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Editor-in-Chief

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Dr.Zhongfu Tan
National Professor,
North China Electric Power University,
CHINA


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ISSN(Online): 2394-6849

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Thomson Reuters ID : q-6288-2016.
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