Open Access Journal

ISSN : 2394 - 6849 (Online)

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Open Access Journal

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering
Call For Paper : Vol 11, Issue 03, March 2024

ISSN : 2394-6849 (Online)

Call for Paper

Vol 11, Issue 03, March 2024

Indexing

A Low Power and Area Efficient Symmetric Stacking Counter

Author : Clince Babu 1 Manju Priya 2 E.Ramya 3

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Date of Publication :24th April 2018

Abstract: A very high speed, power and area efficient counter is required in many applications viz. digital memories, ADCs, DACs, microcontroller circuits, frequency dividers, frequency synthesizer etc. Less area, high speed and low power consumption may be met by reducing the size of hardware. Hence, as the applications are increasing, demand for smaller size and longer life batteries increases. This project derives area, power and speed efficient structure counter based on a VLSI design. It uses multiplexer based full adder circuit, which group all of the “1” bits together. In the proposed structure, one XOR block in the conventional full adder is replaced by a multiplexer block so that the critical path delay is minimized. Proposed system is coded in Verilog and simulated using Xilinx 12.1.

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