International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Volume5,April 2018,

Topic : DSP Accelerator Architecture Using Carry-Save Arithmetic

Authors:E. Ramya || Roja. S, Roja.R, Sandhiya.G

Abstract:A high-performance data path to implement DSP kernels are introduced in this paper. Hardware acceleration has been proved an extremely promising implementation DSP domain. We present a novel accelerator architecture comprising flexible computational units for the execution of a large set of operation templates in DSP kernels. Carry Save method has been implemented to improve the performance of the accelerator while computing more bits. Advanced arithmetic design concepts, i.e., recording techniques, are utilized enabling CS optimizations to be performed in a larger scope than in previous approaches. Accelerator architecture delivers average gain compared with the state-of-art flexible datapaths..

Keywords: Arithmetic optimizations, carry-save (CS) form, datapath synthesis, flexible accelerator, flexible datapath operation chaining,recoding techniques.

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DOI: 01.1617/vol5/iss4/pid42173


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Dr.Zhongfu Tan
National Professor,
North China Electric Power University,
CHINA


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