Date of Publication :25th May 2018
Abstract: These days, the size of systems are increasingly large scale due to the practical applications, which poses significance importance in the field of neural networks. Deep neural networks(DNN)has been employed for image recognition since it can accomplish high exactness by copying conduct of optic nerve in living animal. In order to enhance the execution and additionally to keep up low power cost, in this paper, we design deep learning accelerator unit(DLAU), which is the scalable accelerator for largescale networks using field-programmable gate array(FPGA) as hardware prototype. In order to improve throughput, it utilizes the tile techniques and employs three pipelined processing units to explore the locality for deep learning applications
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