International Journal of Engineering Research in Electronics and Communication Engineering (IJERECE)

Monthly Journal for Electronics and Communication Engineering

Volume4,March 2017,

Topic : A High Gain Low Power CMOS Operational Amplifier

Authors:K.Poshana || K.Lokesh Krishna , K. Veda Samhitha

Abstract:This paper presents the design and simulation of a high gain low power complementary metal oxide semiconductor operational amplifier in 90nm technology. The aspect ratios of all the transistors were designed. High gain allows the operational amplifier (op-amp) circuit to function efficiently in a closed loop feedback system, whereas wide bandwidth makes the circuit to operate for high speed applications. The proposed op-amp design consists of two stages and operates at 1.2V power supply. It is aimed to meet a set of standard specifications. The entire op-amp design is evaluated using Cadence software tools, while the layout has been developed using Virtuoso. The op-amp circuit is able to achieve 38 dB gain, a 4V output swing, a 12.7 V/µsecond slew rate and a CMRR of 61 dB with a power supply voltage of 1.2 V..

Keywords: Slew rate, low power, sampling, high speed, closed loop system, bandwidth and aspect ratio.

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DOI: 01.1617/vol4iss3pid018


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Editor-in-Chief

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Dr.Zhongfu Tan
National Professor,
North China Electric Power University,
CHINA


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IMPACT FACTOR: 3.689

ISSN(Online): 2394-6849

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Thomson Reuters ID : q-6288-2016.
ORCiD Research ID : 0000-0001-9540-6799

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Journal Code : IJERECE
Electronic ISSN : 2394-6849
Impact Factor : 3.689
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