Open Access Journal

ISSN : 2394 - 6849 (Online)

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Open Access Journal

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

ISSN : 2394-6849 (Online)

Verilog Implementation of Reversible Logic Gate

Author : P Sravani 1 V Sai Koushik 2 D Srinivas 3

Date of Publication :7th March 2016

Abstract: Technologies day-to-day are becoming smaller, faster and more complex than its previous technologies being developed. Increase in clock frequency to achieve good speed and increase in number of transistors packed onto the chip to achieve complexity of a conventional system results in increased power consumption. All the gates used to perform Boolean algebra based computations by the use of silicon based semiconductor technology in a Conventional logic system are irreversible in nature. This is due to the mismatch of inputs and outputs. Reversible Logic is gaining interest in the recent past due to its less heat dissipating characteristics. This logic circuit maps to its unique input to the output and ensure one to one mapping and basis for emerging applications like DNA Computing, Bioinformatics, Nanotechnologies, Quantum Computing, Quantum Dot Cellular Data, Adiabatic CMOS, Thermodynamics, Low power Design and Optical Computing to produce zero power dissipation under ideal conditions. This paper presents the combinational circuit and Verilog code for the basic Reversible Logic gates which are important (Feynman, Double Feynman, Fredkin, Toffoli and peres ). Every Logic circuit which is combinational uses all these basic Reversible Logic Gates and can be verified through Simulation using Verilog HDL.

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