Open Access Journal

ISSN : 2394 - 6849 (Online)

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Open Access Journal

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

ISSN : 2394-6849 (Online)

Basic March-C Algorithm based BIST for Embedded Memories in FPGA

Author : Hema G D 1 DivyaPrabha 2 M.Z. Kurian 3

Date of Publication :7th May 2016

Abstract: Built in Self Test is one of the widely used methods for memory testing and it is the cost effective method. The fault in the memory is due to the complexity of the design rules. For complex applications, the memories without faults are necessary. There are many test algorithms for testing of memories, march based tests are the dominant testing algorithms due to simplicity and ability to test the faults. Because of this, march tests are implemented in most modern memories BIST. In this project, by considering optimized march-c algorithm to test the faults. This algorithm uses the concurrent technique. Because of concurrency the testing time is reduced compared to basic march c algorithm. This technique is applied to 256x8 memories it can be extended to any size. For the effectiveness of this algorithm, Built-in selftest technique is considered to test embedded memory of the FPGA.

Reference :

  1. [1] Modified March C - Algorithm for Embedded Memory Testing by muddapu parvathi, N.vasantha, K.Satya Parasad International Journal of Electrical and Computer Engineering (IJECE) Vol. 2, No.5, October 2012, pp. 571~576ISSN: 2088-8708.

    [2] Der-Cheng Huang; Wen-Ben Jone, "A parallel built-in self-diagnostic method for embedded memory arrays," in Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on , vol.21, no.4, pp.449- 465, Apr 2002.

    [3] Design of Built-in Self-Test Core for SRAM by Reeja J. and Anusree L. S. International Journal of Engineering Research & Technology (IJERT) ISSN: 2278-0181 Vol. 3 Issue 3, March – 2014.

    [4] A Failure Testing System with March C-Algorithm for SingleEvent Upset by Peng Wang, ZhenLi, Chengxiang Jiang, Wei Shao and Qiannan Xue International Journal of Hybrid Information Technology Vol.7, No.2 (2014), pp.95-102.

    [5] Design of Improved Built-In-Self-Test Algorithm (8n) for Single Port Memory by Manoj Vishnoi, Arun Kumar, Minakshi Sanadhya International Journal of Soft Computing and Engineering (IJSCE) ISSN: 2231-2307, Volume-2, Issue-5, November 2012.

    [6] J.vande Goor.Testing Semiconductor Memories: Theory and Practice. A.J.vande Goor, 1998.

    [7] Testing of Embedded System Version 2 EE IIT, Kharagpur Lesson 40 Built-In-Self-Test (BIST) for Embedded Systems


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