Open Access Journal

ISSN : 2394 - 6849 (Online)

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Open Access Journal

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

ISSN : 2394-6849 (Online)

Comparative Performance Analysis of CMOS Full Adders Using Various Pass Transistor Logic

Author : Bore Gowda H B 1

Date of Publication :7th June 2016

Abstract: with the advancement in semiconductor technology, chip density and power consumption in VLSI circuits has become a major problem consideration. More area and power consumption increases the packaging cost and reduces the battery life of the devices. Hence it’s necessary to design any VLSI circuits with less chip area and power consumption. In this paper an efficient full adder circuit is designed with various pass transistor logic families by using microwind simulating tool with CMOS 0.12?m processing technology. Microwind is truly integrated EDA software encompassing IC designs from concept to completion, enabling chip designers to design beyond their imagination. Microwind integrates traditionally separated front end and back end chip design into an integrated flow, accelerated the design cycle and reduced design complexity.

Reference :

  1. [1] Ahmed M. Shames, Tarek K. darwish and Magdy A. Bayoumi, "Performance Analysis of Low-Power 1-Bit CMOS Full Adder Cells", IEEE Trans. Very Large Scale Integr.(VLSI) Syst., vol.10, no.1, Feb.2002.

    [2] Mariano Aguirre and Monico Linares, "An Alternative Logic Approach to Implement High-Speed Low-Power Full Adder"

    [3] Sundeepkumar Agarwal, pavankumar V K and Yokesh R, "Energy-Efficient, High Performance Circuits for Arithmetic Units", IEEE DOI 10.1109/VLSI.2008.49.

    [4] Nan Zhuang and Haomin W U, “A New Design of the CMOS Full Adder”, IEEE Journal of Solid-State Circuits, vol.27, no.5, May 1992.

    [5] Reto Zimmermann and Wolfgang Fichtner, “LowPower Logic Styles: CMOS Verses Pass-Transistor Logic”, IEEE Journal of Solids-State Circuits, vol.32, no.7, Jul 1997.

    [6] A. Shams, and M. Bayoumi, “Performance Evaluation of 1-bit CMOS Adder Cells”, IEEE, 1999.

    [7] Eugene D Fabricius Introduction to VLSI Design. McGraw-Hill International Editions.

    [8] Video reference: Low power VLSI Circuits and Systems by Prof. Ajit pal, Computer Science and Engineering, IIT Kharagpur. http://m.youtube.com/watch?v=x6iuqD94DOU


Recent Article