Open Access Journal

ISSN : 2394 - 6849 (Online)

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Open Access Journal

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

ISSN : 2394-6849 (Online)

IR Drop and Electro Migration Reduction Techniques in Deep Sub-Micron technologies

Author : D. Paramesh Kumar 1 Mr. D. Raja Ramesh 2

Date of Publication :7th August 2016

Abstract: Power is an important parameter in the recent years due to the ramp up of mobile devices, which need to support the device operation for longer times without need for external power source. So the voltage is scaling to help with this along with scaling of transistor. It helps in increasing the cell density in a given area, but needs higher current density and more no. of interconnects. To support this, the wire dimensions are also minimized, which causes more resistance due to which IR drop occurs. If enough voltage is not available at the cells, it affects timing; if available voltage is even lesser, it will lead to functional failure. If it happens on clock network, it causes skew. Increase in current density and decrease in dimensions of wire cause Electro migration which occurs due to the momentum transfer from electrons to the atoms in the wire. If more current is flowing and if it exceeds the current density limit of the interconnect, it leads to Electro migration. Due to this, the wire dimensions will decrease even more and cause more resistance, heat and current density. The project IR Drop and Electro migration Reduction Techniques in Deep Sub-Micron Technologies, discusses the techniques to find out the whether it is resistance or current which is causing the IR Drop in a region, and shifting the timing window of the instances in high IR drop region to avoid simultaneous switching. It also implements the techniques to find out the minimum width which is necessary in the present metal layer as well as in higher metal layer in order to avoid the Electro migration.

Reference :

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    [7]] Understand and Avoid Electro migration (EM) & IRdrop in Custom IP Blocks.Published: 2011, Solvnet. http://www.synopsys.com/Tools/Verification/CapsuleModu le/CustomSim-RA-wp.pdf

    [8]] Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits – Roy, K http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=118 2065&url=http%3A%2F%2Fieeexplore.ieee.org%2Fiel5% 2F5%2F26532%2F01182065


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