Open Access Journal

ISSN : 2394 - 6849 (Online)

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Open Access Journal

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

ISSN : 2394-6849 (Online)

Design of Nikhilam Sutra And Reversible Logic For Vedic Multiplier

Author : Sawankumar 1 Mr. M.C. Chandrashekhar 2 Dr. M.Z. Kurian 3

Date of Publication :12th July 2017

Abstract: In this paperNikhilam Sutra of Vedic mathematics and Reversible Logic is discussed which are helpful in improving the performance of Multipliers

Reference :

    1. Vedic Mathematics or Sixteen Simple Mathematical Formulae from the Vedas By Jagadguru Swami Sri Bharati Krsna Tirthaji Maharaja, Sankaracharya Of Oovardhana Matha, Puri.
    2. Pawan Kumar, Sai Prasad Goud, “FPGA Implementation of high speed 8-bit Vedic multiplier using barrel shifter”, 978-1-4673-6150-7/ ©2013 IEEE.
    3. C.H. Bennett, “Logical Reversibility of Computation”, IBM J.Research and Development, pp. 525-532, November 1973.
    4.  R. Landauer, “Irreversibility and Heat Generation in the Computational Process”, IBM Journal of Research and Development, 5, pp. 183- 191, 1961.
    5. "Design Methodologies for Reversible Logic Based Barrel Shifters", Saurabh Kotiyal, University of South Florida, January 2012.
    6. Rakshith Saligram and Rakshith T.R “Optimized Reversible Vedic Multipliers for High Speed Low Power Operations” Proceedings of 2013 IEEE Conference on Information and Communication Technologies (ICT 2013).

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