Author : P.Malini 1
Date of Publication :31st December 2017
Abstract: This paper attempts to show the survey on 8-bit carry look ahead adder with Gate delay, propagation delay, and the total number of gates are listed. The circuits were built in .asl file and simulated using AUSIM L2.3. The operation of digital logic simulator called the Auburn University Simulator (AUSIM) is described. The AUSIM version L2.3not only provides the simulation of non-hierarchical circuit descriptions but also provides area and performance audits of the cell.