Open Access Journal

ISSN : 2394-6849 (Online)

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Open Access Journal

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

ISSN : 2394-6849 (Online)

Design Of Shift Register Using Current Mode Logic D Flip Flops

Author : Jaya Sri Lakshmi V 1 Sagar Krishna S 2

Date of Publication :10th June 2020

Abstract: Over past few years, the surpassing advancements in Integrated system technologies is; there is a major solid growth in using micro circuitry devices. In this digital world, electronic devices like computers, mostly use registers for multi purposes. Theme of the paper is to Design a Shift Register using CML technique D-Flip Flops. This idea is used for low voltage supply and speed improvement. D flip-flop is designed using D-latches. To satisfy the speed requirements, D-latches are usually designed in current-mode logic (CML). The CML is itself a MOS differential pair. In this paper, D latches are designed using conventional method, triple-tail method, folded method and their performance is compared in terms of Power (Reference Current ISS over 500μ A) and delay. The folded D latch gives best results in terms performance and delay. This folded D latch is used for the design of d flip-flops. With the help of D Flip-Flops, the proposed Shift Register is implemented.

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DOI : 10.36647/ijerece/0000