Open Access Journal

ISSN : 2394 - 6849 (Online)

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Open Access Journal

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

ISSN : 2394-6849 (Online)

Displaying Image through VGA Cable using Verilog

Author : Vishal Chauhan 1 Sahil Mursalin 2 Madhav Jha 3 Govind Singh Patel 4 Gaurav Pratap Singh 5

Date of Publication :16th September 2021

Abstract: VGA (Video Graphics Array) is a standard display interface that has been widely used. This paper represents the design and implementation of VGA controller by displaying some prestored images into the FPGA memory. Detailed information is focused on the system architecture and software programming. This controller is developed using Verilog HDL and VHDL (hardware description language). The system can display various types of images or patterns. Verilog HDL is used to describe and program the gates and counters in FPGA blocks in order to construct desired logic circuit in it. The main purpose of this project is to design and implement VGA Controller on FPGA and to display an image on VGA display by storing it in memory. Therefore, the block diagram for VGA Controller is designed and the VGA Controller program is written based on the block diagram using VHDL and Verilog. All the basic functions that are required to run the code of VGA controller is written in the Verilog code and testbench of that following functions is also created to ensure the proper functioning of VGA controller without any errors. Finally, the completed program is implemented on FPGAs chip of SPARTAN-3E Development and Educational Board and successfully able to display image.

Reference :

    1. Fangqin Ying, Xiaoqing Feng, “Design and Implementation of VGA Controller Using FPGA”, International Journal of Advancements in Computing Technology (IJACT), Vol. 4, No. 17, pp. 458-465, Sep 2012.
    2. Radi H.R, Caleb W.W.K, M.N.Shah Zainudin, M.Muzafar Ismail, “The Design and Implementation of VGA Controller on FPGA”, International Journal of Electrical & Computer Sciences, Vol. 12, No. 5, pp. 56- 60, Oct. 2012.
    3. ALDEC, Inc., “EVITA Enhanced Verilog Tutorial with Applications" 1998.
    4. V. H. Tran and X. T. Tran, “An efficient architecture design for VGA monitor controller,” 2011 Int. Conf. Consum. Electron. Commun. Networks, CECNet 2011 - Proc., pp. 3917–3921, 2011.
    5. N. N. E. Murphy, F. Morgan, and J. Manning, “An FPGA based Stereoptic Image Capture System.,” Issc.Exordo.Com, pp. 95–95, 2012.
    6. K. Takaya and Z. Qian, “FPGA based stereo vision system to display disparity map in realtime,” 2012 Int. Conf. Inf. Sci. Appl. ICISA 2012, no. 1, pp. 3–6, 2012.
    7. C. Plaza, O. Ramos, and D. Amaya, “VGA Configuration Algorithm using VHDL,” vol. 13, no. 14, pp. 11572–11576, 2018
    8. R. Jeyakumar, M. Prakash, S. Sivanantham, and K. Sivasankaran, “FPGA implementation of edge detection using Canny algorithm,” IC-GET 2015 - Proc. 2015 Online Int. Conf. Green Eng. Technol., pp. 1–4, 2016.
    9. L. Sheng, J. Shao, M. Xu, and Y. Cui, “Display verification IP core design based on star-extraction and star-recognition image processing on FPGA,” Proc. - 2011 5th Int. Conf. Innov. Mob. Internet Serv. Ubiquitous Comput. IMIS 2011, pp. 151–155, 2011
    10. V. Vanishree and K. V. R. Reddy, “Implementation of pipelined sobel edge detection algorithm on FPGA for High speed applications,” Proc. - 2013 Int. Conf. Emerg. Trends Commun. Control. Signal Process. Comput. Appl. IEEE-C2SPCA 2013, pp. 1– 5, 2013.
    11. FPGA Projects, Verilog Projects, VHDL Projects - FPGA4student.com
    12. Driving a VGA Monitor Using an FPGA – Embedded Thoughts
    13. E. Hwang, “Build a VGA Monitor Controller”, Nov. 2004.

Recent Article