Date of Publication :31st December 2021
Abstract: To meet the demand of better cryptographic systems a TRNG (True random number generator) play a vital role. This paper shows an efficient method on FPGA that utilizes free running oscillators in which random jitter is used as a source of randomness for the generation of true random numbers. Programmable delay lines used to generate variations and to add jitter in the free running oscillator rings. This true number generator has advantage over previous designs as it reduces the correlation for the equal length ring oscillators which leads to multiple zeros in the random numbers using the programmable delay lines. The paper is implemented on Xilinx Artix-7 FPGA.
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