Date of Publication :30th June 2015

Abstract: Integer Multiplication is considered as the basic fundamental building block of digital design .It deeply affects the performance of the DSP activities. This paper proposes a novel approach to build integer multiplication circuits that is based on speculate method. This is a technique which performs a faster-but occasionally wrong-operation. The rare case of error is corrected using a multi-cycle error correction circuit. The proposed speculative multiplier uses a three dimensional method reduction tree. The method is implemented using three steps: partial products recoding, partial products partitioning, speculative compression. It also uses speculative counters, that are faster than a conventional tree using full-adder and half-adders. Comparisons with conventional multiplier show that speculation is more effective when high speed is required. Speculative multipliers allow reaching a higher speed when compared with its conventional counterparts and are also quite effective in terms of power dissipation, when a high speed operation is required.

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