Author : Vinutha P 1
Date of Publication :7th March 2017
Abstract: The core of all the digital signal processor(DSPs) are its multipliers and the speed of the DSPs is mainly determined by the speed of its multipliers. Latency and throughput are the two important parameters associated with multiplication algorithm performed in DSP application. The performance of multiplication in terms of speed and power is crucial for most of the digital signal processor applications. In this paper, a design of 32 bit multiplier using the nikilam sutra to minimize the power delay product of multipliers intended for high performance and low power applications.
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