Author : Konduru Lakshmi 1
Date of Publication :7th March 2017
Abstract: Adders are basic essential component used in DSPs Processors and Digital filters and widely used in the Digital Integrated Circuits and also in Analog ICs.In this paper, a carry skip adder structure that has a higher speed, Low area as well as lower energy consumption compared with other adders is presented. The speed and reduction in the design area can be achieved by using “HYBRID MUX” instead of conventional MUX for skip logic in the existing method. In addition, instead of utilizing compound gates (AOI&OAI), the proposed structure makes use of “HYBRID MUX” for the skip logic. The Proposed structure assessed by comparing their speed, delay, area & energy parameters with those of other adders using a 45-nm static CMOS technology. The results that are obtained by Xilinx tool. Simulation reveals, on average 45% and 40% improvements in the delay &energy, respectively compared with conventional one. The power delay product is the lowest among all adders.
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