Open Access Journal

ISSN : 2394-6849 (Online)

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Open Access Journal

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

ISSN : 2394-6849 (Online)

Smart Vending Machine

Author : Aji Joseph George 1 Merin Mathai 2 Misty Shabu 3 Soumya M.P 4 Soumya Mathew 5

Date of Publication :7th August 2015

Abstract: Today in fast moving world everyone want things with ease and quality. Vending machines are used to dispense different products, when money is inserted. Here in paper we have designed an efficient vendingmachine on FPGA board. FPGA implemented Vending machine give better response and less power consumption than the microcontroller based vending machine. In this paper we are having four products.In simple vending machine automatically cancel if entered money isnt enough and there is no balance provided. This machine accepts moneys as inputs in any sequence and delivers products when required amount is deposited and gives back the change if entered amount is greater than the price of product. The money recognition done using MATLAB by taking the real time photo of money, recognize whether coin or note, and the total value of the money is calculated in terms of Indian National Rupees (INR). The money recognition uses Canny edge detection method .The machine also supports cancel feature means a user can withdraw the request any time and entered money will be returned back without any product. The algorithm is implemented using real time money recognition, product entry and its delivery. The proposed algorithm is implemented using combination of Matlab and Xilinx and simulated in Xilinx StateCAD tool .

Reference :

  1. [1] International Journal of VLSI design & Communication Systems “Finite State Machine based Vending MachineController with Auto Billing Features”

    [2] Peter Minns, Ian Elliott, “FSM-based Digital Design using Verilog HDL”, John Wiley & Sons,Ltd 2008.

    [3] Phong P. Chu, “FPGA Prototyping Using Verilog HDLXilinx Spartan 3 Version”, John Wile y & Sons,Ltd


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DOI : 10.36647/ijerece/0000