Author : Nisha S Police Patil 1
Date of Publication :7th May 2016
Abstract: Due to voltage scaling in CMOS logic circuits, there will be a reduction in threshold voltage which leads to increase in the sub threshold leakage current and hence static power dissipation. Although power consumption is important for modern VLSI design, the main requirements of the VLSI design are, operating speed and occupied area. Multithreshold voltage CMOS (MTCMOS) technology is a good solution providing high speed performance and low power design without area overhead. MTCMOS technology provides the transistors that have low, high and normal threshold voltage. The low threshold voltage transistors are used to reduce the propagation delay in critical (longest) path, the high-threshold voltage transistors are used to reduce the power consumption in shortest path. This paper describes a high-speed performance and low-power consumption design for full adder (using 2 half-adder), 4-bit ripple carry adder, 4x4 multiplier and 16-bit carry look-ahead adder circuits with MTCMOS technology using 45nm technology
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