Open Access Journal

ISSN : 2394 - 6849 (Online)

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Open Access Journal

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

ISSN : 2394-6849 (Online)

Investigation of Logic Level Techniques to Improve AES Throughput

Author : Megha S Hallikeri 1 Raghuram Srinivasan 2

Date of Publication :7th May 2016

Abstract: Substitution Box(S-Box) is an important integral part of modern cryptographic cipher techniques like Advanced Encryption Standard (AES). There exists a bulk literature devoted to the implementation of AES. Combinational logic of implementation attains high throughput in terms of parameters like speed, area, delay etc. This paper represents the working principle of AES, Novel algorithmic approaches for S-Box. We mainly concentrated on combinational logic implementation of SBox in order to Improve Area. AES is programmed and executed on Xilinx 14.7 version, Spartan 3 Family, ModelSim Simulator. Cadence 180nm tool is used to verify the parameters. We examine the current work which exploits the mathematical properties of S-Box. Using this technique throughput is increased by 30%. We verified individual modules separately and waveforms are obtained.

Reference :

  1. [1] P.V.S.ShastIy, Anuja Agnihotri, Divya Kachhwaha, Jayasmita Singh, Dr.M.S.Sutaone ” A Combinational Logic Implementation of S-box of AES” 978-1-61284- 857-0/11/$26.00 @2011 IEEE

    [2] Xinmiao Zhang, Keshab K. Parhi “Implementation Approaches for the Advanced EncryptionStandard Algorithm” 1531-636X/12/$10.00©2002IEEE

    [3] J. Daeme, V.Rijmen “ AES proposal: Rijndael. NIST AES Proposal” April 2003

    [4] Bahram Rashidi, Bahman Rashidi “ Implementation of An Optimized and Pipelined Combinational Logic Rijndael S-Box on FPGA” I. J. Computer Network and Information Security, 2013, 1, 41-48 Published Online January 2013 in MECS (http://www.mecs-press.org/) DOI: 10.5815/ijcnis.2013.01.05

    [5] Saleh Abdel-hafeez, Ahmed Sawalmeh, Sameer Bataineh “HIGH PERFORMANCE AES DESIGN USING PIPELINING STRUCTURE OVER GF((24 ) 2 )” 2007 IEEE International Conference on Signal Processing and Communications (ICSPC 2007), 24-27 November 2007, Dubai, United Arab Emirates


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