Open Access Journal

ISSN : 2394 - 6849 (Online)

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Open Access Journal

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

ISSN : 2394-6849 (Online)

Proposed FAM Unit with S-MB Techniques and Kogge Stone Adder using VHDL

Author : Dhumal Ashwini Kashinath 1 Asst. Prof. Shirgan Siddharudha Shivputra 2

Date of Publication :7th December 2016

Abstract: This paper represent the high efficient design of Add-Multiply operator. The DSP applications requires the more number of add and multiplier operator .In this paper only concentration on how to reduce the Add-Multiply operator and increase the speed of the process .In the recent paper ,first addition of the two number and after convert into its Modified Booth (MB)form. It required more gates then performance decreases. But in this paper we take direct two number and given to the efficient recoding technique it generate MB form .The Booth algorithm required the adder but adder have number of types. If we use the Kogge stone adder bits size increase then the performance of adder also increase means whole system performance increase. Then compare the proposed system with existing system ,we get less gates and less combinational delays of the proposed system .

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