Date of Publication :8th May 2023

Abstract: To move a data word’s bit position to the left or right, utilize a shift register. The brief proposes XOR gate, NOT gate as feedback latch based linear shift register. This paper presents a high secure linear feedback shift register, which can perform both serial and parallel operations. They reduce the power consumption and delay by replacing gate as feedback with the proposes based latch. The proposes 16-bit linear feedback shift register were simulated using 90nm CMOS process. A linear feedback shift register (LFSR) has been studied in this paper XOR gate and NOT gate use as feedback for enhancement of security purpose. They consume power 94.59% and 95.16% and reduce delay 86.72% and 27.40% with Vdd= 1.8V and a clock frequency of 100MHz.

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