International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Volume4,August 2017,

Topic : A Novel Implementation of secure VLSI logic design

Authors:Kusuma B T || A.R.Priyarenjini

Abstract:Crypto circuits can be attacked by third parties using differential power analysis (DPA), which uses power consumption dependence on data being processed to reveal critical information. To protect security devices against this issue, differential logic styles with (almost) constant power dissipation are widely used. However, to use such circuits effectively for secure applications it is necessary to eliminate any energy-secure flaw in security in the shape of memory effects that could leak information. This paper proposes a design methodology to improve pull-down logic configuration for secure differential gates by redistributing the charge stored in internal nodes and thus, removing memory effects that represent a significant threat to security. To evaluate the methodology, it was applied to the design of AND/NAND and XOR/XNOR gates in a 90 nm technology, adopting the Sense amplifier based logic (SABL) style for the pull-up network. Sbox 8 can be implemented using these circuits for the security purpose..

Keywords: Complementary metal oxide semiconductor (CMOS) digital circuits, differential power analysis (DPA), sidechannel attacks(SCA), and very large scale integration (VLSI) design of cryptographic circuits.

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DOI: 01.1617/vol4/iss8/pid59402

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Dr.Zhongfu Tan
National Professor,
North China Electric Power University,

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ISSN(Online): 2394-6849

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Thomson Reuters ID : q-6288-2016.
ORCiD Research ID : 0000-0001-9540-6799

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Journal Code : IJERECE
Electronic ISSN : 2394-6849
Impact Factor : 3.689
Frequency : monthly
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