International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Volume3,April 2016,

Topic : A Method for Error Detection and Correction of Fault Secure OLS Decoder

Authors:Sahad B || Chithra M

Abstract:Reliability is one of the major issues of advanced electronic circuits. In recent years there are several error correction codes (ECC) developed to protect the memories and registers in electronic circuits. But the encoder and decoder circuit may also suffer errors, for these reasons concurrent error detection (CED) and correction technique for orthogonal Latin square (OLS) decoder is proposed. This technique is strongly fault secured for single stuck at faults. The most significant advantage is that it achieves 100 percentage fault coverage for the whole CED circuit. The CED and correction is applicable to both binary and non binary OLS codes also. The proposed method can be achieved by performing the checking in parallel with the majority voting, syndrome generator and error corrector and orthogonal generator in the case of the decoder. Synthesis can be done in Xilinx ISE design suite 13.2 and simulation can be done with ModelSim..

Keywords: Error Correction Codes (ECC), Concurrent Error Detection (CED), Orthogonal Latin Square (OLS).

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DOI: 01.1617/vol3iss4pid174


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Editor-in-Chief

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Dr.Zhongfu Tan
National Professor,
North China Electric Power University,
CHINA


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IMPACT FACTOR: 3.689

ISSN(Online): 2394-6849

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Thomson Reuters ID : q-6288-2016.
ORCiD Research ID : 0000-0001-9540-6799

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