Open Access Journal

ISSN : 2394 - 6849 (Online)

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Open Access Journal

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

ISSN : 2394-6849 (Online)

Reference :

  1. [1]K. Tsoumanis, S. Xydis, C. Efstathiou, N. Moschopoulos, and K. Pekmestzi, “Flexible DSP Accelerator Architecture Exploiting Carry-Save Arithmetic”, IEEE Trans.Circuits Syst. I, Reg. Papers, volume: 61, no.4, January 2015.

    [2] K. Tsoumanis, S. Xydis, C. Efstathiou, N. Moschopoulos, and K. Pekmestzi,“An optimized modified booth recoder for efficient design of the add-multiply operator”, IEEE Trans. Circuits Syst. I, Reg. Papers, volume: 61, no.4, April 2014.

    [3] M. Stojilovic, D. Novo, L. Saranovac, P. Brisk, and P. Ienne, “Selective flexibility: Creating domain-specific reconfigurable arrays”, IEEE Trans.Comput.-Aided Design Integr. Circuits Syst., volume:32, no.5,May 2013.

    [4] G. Ansaloni, P. Bonzini, and L. Pozzi, “EGRA: A coarse grained reconfigurable architectural template”, IEEE Trans. Very Large Scale Integr. (VLSI) Syst., volume: 19, no. 6, June. 2011.

    [5] S. Xydis, G. Economakos, D. Soudris, and K. Pekmestzi, “High performance and area efficient flexible DSP datapath synthesis” IEEE Trans.Very Large Scale Integr. (VLSI) Syst., volume: 19, no. 3, March. 2011.

    [6] K. Compton and S. Hauck,“Automatic design of reconfigurable domain specific flexible cores”, IEEE Trans. Very Large Scale Integr. (VLSI) Syst.,volume: 16, no.5,May 2008.

    [7] M. D. Galanis, G. Theodoridis, S. Tragoudas, and C. E. Goutis, “A high performance data path for synthesizing DSP kernels”, IEEETrans. Comput.- Aided Design Integr. Circuits Syst., volume: 25, no. 6, June. 2006.


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