Open Access Journal

ISSN : 2394 - 6849 (Online)

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

Open Access Journal

International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)

Monthly Journal for Electronics and Communication Engineering

ISSN : 2394-6849 (Online)

Reference :

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    [5] Ravish Aradhya H.V, Lakshmesha J, Muralidhara K.N, “Design optimization of Reversible Logic Universal Barrel Shifter for Low Power applications”, International Journal of Computer Applications, Vol. 40, No. 15, pp. 0975-8887, Feb 2012.

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    [8]BhavaniPrasad.Y, Rajeev Pankaj.N, Samhitha.N.R, Shruthi.U.K, “Design of Reversible Multiplier by Novel ANU gate”, International Journal of Engineering and Technology, Vol. 4, No, 6, pp. 2049-3444, June 2014.

    [9]PragyanParamita Mohantly1, Mrs.Annapurana K.Y.2, “FPGA Implementation of Iterative Log Multiplier using Operand Decomposition for Image Processing Application”, International Journal for Research in Applied Science and Engineering Technology, Vol. 2, No. 6, pp. 2321-9653, June 2014.

    [10] Patricio Buli‟c*, ZdenkaBabi‟c and AleksejAvramovi‟c, “A Simple Pipelined Logarithmic Multiplier”, IEEE Transactions on Computers, pp. 978-1-4244-8935, Oct 2010.

    [11] Arindam Banerjee*, SamayitaSankar, Mainuck Das and AniruddhaGhosh, “Design of Reversible binary Logarithmic Multiplier and Divider using Optimal Harbage”, International Journal of Advanced Computer Research, Vol. 5, No. 18. pp. 2277-7970, March 2015.

    [12] Rakshith.T.R, Rakshith Saligram, “Design of High Speed Low Power Multiplier using Reversible Logic: a Vedic Mathematical Approach”, International Conference on Circuits, Power and Computing Technologies, pp.4673-492, ICCPCT-2013.

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