Open Access Journal
ISSN : 2394 - 6849 (Online)
International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)
Open Access Journal
International Journal of Engineering Research in Electronics and Communication Engineering(IJERECE)
ISSN : 2394-6849 (Online)
Reference :
[1] T. Kalavathidevi and C. Venkatesh, “Area Efficient Low Power VLSI Architecture for A VITERBI Decoder Using Gate Diffusion Input(GDI) Logic Style”, European Journal of Scientific Research, Vol. 49, no.4, pp. 521-532, March 2011.
[2] C. Arun and P. Rajamani, “Design and VLSI imple mentation of a low probability of error VITERBI decoder,” First international conference on Emerging trends in Engineering and technology, pp. 418-423, 2008.
[3] T. Gemmeke, V. S. Gierenz, and T. G. Noll, “RTL implementation of VITERBI decoder,” Dept. Of Computer Engineering, IEEE Transactions on circuits and systems, June 2006.
[4] S. Swaminathan, R. Tessier, D. Goeckel, and W. Burleson, “A dynamically reconfigurable adaptive VITERBI decoder,” Monterey, California, USA, February 24-26, 2002
[5] Mahender Veshala,Tualsagari Padmaja,Karthik Ghanta, “FPGA Based Design and Implementation of Modified VITERBI Decoder for a Wi-Fi Receiver,” IEEE Conference on Information and Communication Technologies (ICT 2013) ,2013.